Solderability after real time storage

2x reflow- and 1x wave soldering of 1/2 year stored printed circuit boards with a 0,8 µm smarttin®-layer – is that at all possible?

In the „General_Requirements_smarttin®" APL guarantees a third soldering process  for layer thicknesses of 0,8 µm (cpk >1,333) after a storage time of maximum 6 months (in accordance with the ZVEI-recommendation from 28.02.2008).

This performance was investigated in 2009 by Fraunhofer Institute for Silicon Technology ISIT in Itzehoe.  The results were not only positive, they also greatly exceeted all expectations. The related report 394956 can be found at the download area on our homepage.

Since then more than 5 years have passed and we asked ourselves:

"Does it still apply?“

Our clients still order 0,8 µm smarttin®-layers and process them with up to 3 soldering steps.  The practice shows that it still works. The long time since the last investigation was motivation enough for us to execute a re-examination of the efficiency of our smarttin®-layer.

As already in 2009, this investigation was realized by the Fraunhofer Institute for Silicon Technology ISIT.  Our aim was to prove the wave soldering of 0,8 µm smarttin®-layers  (cpk >1,333) after different periods of real time storage and thermal pretreatment conditions. For the decisive wave soldering a lead free solder and No-Flux Clean were used.

The solder process took place under nitrogen atmosphere. All used test boards were retained samples (APL- process test boards) as they been manufacture daily for the process control of the smarttin®-process. These APL – test boards were stocked in the measuring laboratory by normal atmospheric conditions and without special wrapping. The periods of the real time storage was ½ - 1 year. The same pcb type without storage were also analyzed to compare the solderability result.  Those pcbs were pretreated with 1 respectively 2 – reflow – cycles with common solder profile (Peak 245° C, 480 seconds total length). For comparing a wave soldering of test boards without a thermal pretreatment was made.

The coating modification of the smarttin®-layer was analyzed by the FEM in Schwäbisch Gmünd in addition of the soldering experiments from the ISIT. Thereby the increase of the intermetallic, which was caused by the different real time stroages and the different thermal pretreated conditions, was detected.  The examined values for the rest-pure tin layer could be placed in relation by the soldering results.

"And they solder still!"

Author: Mr. Dirk Kaschel

Read more: The entire report of the renewed investigation can be found here